A-4
OPCODE MAP
A.2.1.One-Byte Opcode Instructions
The opcode maps for 1-byte opcodes are shown in Table A-2 and A-3. Looking at the 1-byte
opcode maps, the instruction and its operands can be determined from the hexadecimal opcode.
For example:
Opcode: 030500000000H
Opcode 030500000000H for an ADD instruction can be interpreted from the 1-byte opcode map
as follows. The first digit (0) of the opcode indicates the row, and the second digit (3) indicates
the column in the opcode map tables. The first operand (type Gv) indicates a general register
that is a word or doubleword depending on the operand-size attribute. The second operand (type
Ev) indicates that a ModR/M byte follows that specifies whether the operand is a word or dou-
bleword general-purpose register or a memory address. The ModR/M byte for this instruction is
05H, which indicates that a 32-bit displacement follows (00000000H). The reg/opcode portion
of the ModR/M byte (bits 3 through 5) is 000, indicating the EAX register. Thus, it can be de-
termined that the instruction for this opcode is ADD EAX, mem_op, and the offset of mem_op
is 00000000H.
Some 1- and 2-byte opcodes point to group numbers. These group numbers indicate that the
instruction uses the reg/opcode bits in the ModR/M byte as an opcode extension (refer to Section
A.2.5., Opcode Extensions For One- And Two-byte Opcodes).
A.2.2.Two-Byte Opcode Instructions
Instructions that begin with 0FH can be found in the two-byte opcode maps given in Table A-4
and A-5. The second opcode byte is used to reference a particular row and column in the tables.
For example, the opcode 0FA4050000000003H is located on the two-byte opcode map in row
A, column 4. This opcode indicates a SHLD instruction with the operands Ev, Gv, and Ib. These
operands are defined as follows:
Ev The ModR/M byte follows the opcode to specify a word or doubleword operand
Gv The reg field of the ModR/M byte selects a general-purpose register
Ib Immediate data is encoded in the subsequent byte of the instruction.
The third byte is the ModR/M byte (05H). The mod and opcode/reg fields indicate that a 32-bit
displacement follows, located in the EAX register, and is the source.
The next part of the opcode is the 32-bit displacement for the destination memory operand
(00000000H), and finally the immediate byte representing the count of the shift (03H).
By this breakdown, it has been shown that this opcode represents the instruction:
SHLD DS:00000000H, EAX, 3
LSB address
MSB address
03
05
00
00
00
00
