7-14
FLOATING-POINT UNIT
7.3.2.3.EXCEPTION FLAGS
The six exception flags (bits 0 through 5) of the status word indicate that one or more floating-
point exceptions has been detected since the bits were last cleared. The individual exception
flags (IE, DE, ZE, OE, UE, and PE) are described in detail in Section 7.7., Floating-Point
Exception Handling, Each of the exception flags can be masked by an exception mask bit in
the FPU control word (refer to Section 7.3.4., FPU Control Word). The exception summary
status (ES) flag (bit 7) is set when any of the unmasked exception flags are set. When the ES
Table 7-3. FPU Condition Code Interpretation
Instruction
C0
C3
C2
C1
FCOM, FCOMP, FCOMPP,
FICOM, FICOMP, FTST,
FUCOM, FUCOMP,
FUCOMPP
Result of Comparison
Operands
are not
Comparable
0 or #IS
FCOMI, FCOMIP, FUCOMI,
FUCOMIP
Undefined. (These instructions set the
status flags in the EFLAGS register.)
#IS
FXAM
Operand class
Sign
FPREM, FPREM1
Q2
Q1
0=reduction
complete
1=reduction
incomplete
Q0 or #IS
F2XM1, FADD, FADDP,
FBSTP, FCMOVcc, FIADD,
FDIV, FDIVP, FDIVR,
FDIVRP, FIDIV, FIDIVR,
FIMUL, FIST, FISTP, FISUB,
FISUBR,FMUL, FMULP,
FPATAN, FRNDINT,
FSCALE, FST, FSTP, FSUB,
FSUBP, FSUBR,
FSUBRP,FSQRT, FYL2X,
FYL2XP1
Undefined
Roundup or #IS
FCOS, FSIN, FSINCOS,
FPTAN
Undefined
1=source
operand out of
range.
Roundup or #IS
(Undefined if
C2=1)
FABS, FBLD, FCHS,
FDECSTP, FILD, FINCSTP,
FLD, Load Constants, FSTP
(ext. real), FXCH, FXTRACT
Undefined
0 or #IS
FLDENV, FRSTOR
Each bit loaded from memory
FFREE, FLDCW,
FCLEX/FNCLEX, FNOP,
FSTCW/FNSTCW,
FSTENV/FNSTENV,
FSTSW/FNSTSW,
Undefined
FINIT/FNINIT,
FSAVE/FNSAVE
0
0
0
0
