9-12
PROGRAMMING WITH THE STREAMING SIMD EXTENSIONS
The SQRTSS (Square root scalar single-precision, floating-point) instruction returns the square
root of the least significant component of the packed, single-precision, floating-point numbers
from source to a destination register; the upper three fields are passed through from the source
operand.
9.3.2.4.PACKED MAXIMUM/MINIMUM
The MAXPS (Maximum packed, single-precision, floating-point) instruction returns the
maximum of each pair of packed, single-precision, floating-point numbers into the destination
register. (destreg = {MAX xmm1[1], xmm2[1]; MAX xmm1[2], xmm2[2]; MAX xmm1[3],
xmm2[3]; MAX xmm1[4], xmm2[4]})
The MAXSS (Maximum scalar single-precision, floating-point) instructions returns the
maximum of the least significant pair of packed, single-precision, floating-point numbers into
the destination register; the upper three fields are passed through from the source operand, to the
destination register.
The MINPS (Minimum packed, single-precision, floating-point) instruction returns the
minimum of each pair of packed, single-precision, floating-point numbers into the destination
register. (destreg = {MIN xmm1[1], xmm2[1]; MIN xmm1[2], xmm2[2]; MIN xmm1[3],
xmm2[3]; MIN xmm1[4], xmm2[4]})
The MINSS (Minimum scalar single-precision, floating-point) instruction returns the minimum
of the least significant pair of packed, single-precision, floating-point numbers into the destina-
tion register; the upper three fields are passed through from the source operand, to the destina-
tion register.
9.3.3.Comparison Instructions
The CMPPS (Compare packed, single-precision, floating-point) instruction compares four pairs
of packed, single-precision, floating-point numbers using the immediate operand as a predicate,
returning per SP field an all "1" 32-bit mask or an all "0" 32-bit mask as a result. The instruction
supports a full set of 12 conditions: equal, less than, less than equal, greater than, greater than or
equal, unordered, not equal, not less than, not less than or equal, not greater than, not greater
than or equal, ordered.
The CMPSS (Compare scalar single-precision, floating-point) instruction compares the least
significant pairs of packed, single-precision, floating-point numbers using the immediate
operand as a predicate (same as CMPPS), returning per SP field an all "1" 32-bit mask or an all
"0" 32-bit mask as a result.
The COMISS (Compare scalar single-precision, floating-point ordered and set EFLAGS)
instruction compares the least significant pairs of packed, single-precision, floating-point
numbers, and sets the ZF, PF, and CF bits in the EFLAGS register (the OF, SF, and AF bits are
cleared).
The UCOMISS (Unordered compare scalar single-precision, floating-point ordered and set
EFLAGS) instruction compares the least significant pairs of packed, single-precision, floating-
